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[/] [or1k/] [tags/] [rel_2/] - Rev 171

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171 Added monitor.v and timescale.v lampret 8433d 11h /or1k/tags/rel_2/
170 Added cfg regs. Moved all defines into one defines.v file. More cleanup. lampret 8433d 11h /or1k/tags/rel_2/
169 Fixed memory cells. Moved monitor.h into monitor.v lampret 8433d 11h /or1k/tags/rel_2/
168 Major clean-up. lampret 8437d 01h /or1k/tags/rel_2/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8438d 00h /or1k/tags/rel_2/
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8455d 11h /or1k/tags/rel_2/
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8455d 11h /or1k/tags/rel_2/
164 *** empty log message *** lampret 8457d 14h /or1k/tags/rel_2/
163 Forgot files.f file. lampret 8457d 14h /or1k/tags/rel_2/
162 Benches (under development). lampret 8457d 14h /or1k/tags/rel_2/
161 Development version of RTL. Libraries are missing. lampret 8457d 14h /or1k/tags/rel_2/
160 simulation script lampret 8457d 14h /or1k/tags/rel_2/
159 synthesis scripts lampret 8457d 14h /or1k/tags/rel_2/
158 Initial RTEMS import chris 8467d 04h /or1k/tags/rel_2/
157 Update simons 8474d 07h /or1k/tags/rel_2/
156 File moved to opcode. simons 8474d 07h /or1k/tags/rel_2/
155 Update simons 8474d 07h /or1k/tags/rel_2/
154 Updated for new runtime environment chris 8480d 07h /or1k/tags/rel_2/
153 Writes to SPR_PC are now enabled chris 8480d 08h /or1k/tags/rel_2/
152 Breakpoint exceptions from single step are not printed now. chris 8480d 08h /or1k/tags/rel_2/

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