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[/] [or1k/] [tags/] [rel_21/] - Rev 992

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Rev Log message Author Age Path
992 A bug when cache enabled and bus error comes fixed. simons 8062d 01h /or1k/tags/rel_21/
991 Different memory controller. simons 8062d 01h /or1k/tags/rel_21/
990 Test is now complete. simons 8062d 01h /or1k/tags/rel_21/
989 c++ is making problems so, for now, it is excluded. simons 8063d 09h /or1k/tags/rel_21/
988 ORP architecture supported. simons 8064d 01h /or1k/tags/rel_21/
987 ORP architecture supported. simons 8064d 08h /or1k/tags/rel_21/
986 outputs out of function are not registered anymore markom 8064d 09h /or1k/tags/rel_21/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8064d 20h /or1k/tags/rel_21/
984 Disable SB until it is tested lampret 8064d 20h /or1k/tags/rel_21/
983 First checkin lampret 8064d 22h /or1k/tags/rel_21/
982 Moved to sim/bin lampret 8064d 22h /or1k/tags/rel_21/
981 First checkin. lampret 8064d 22h /or1k/tags/rel_21/
980 Removed sim.tcl that shouldn't be here. lampret 8064d 22h /or1k/tags/rel_21/
979 Removed old test case binaries. lampret 8064d 22h /or1k/tags/rel_21/
978 Added variable delay for SRAM. lampret 8064d 23h /or1k/tags/rel_21/
977 Added store buffer. lampret 8064d 23h /or1k/tags/rel_21/
976 Added store buffer lampret 8064d 23h /or1k/tags/rel_21/
975 First checkin lampret 8064d 23h /or1k/tags/rel_21/
974 Enabled what works on or1ksim and disabled other tests. lampret 8065d 01h /or1k/tags/rel_21/
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 8067d 05h /or1k/tags/rel_21/

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