URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_25/] - Rev 165

Rev	Log message	Author	Age	Path
165	Added variable ack of WB transfers (see NODELAY_WBx).	lampret	8393d 03h	/or1k/tags/rel_25/
164	* empty log message *	lampret	8395d 05h	/or1k/tags/rel_25/
163	Forgot files.f file.	lampret	8395d 05h	/or1k/tags/rel_25/
162	Benches (under development).	lampret	8395d 05h	/or1k/tags/rel_25/
161	Development version of RTL. Libraries are missing.	lampret	8395d 05h	/or1k/tags/rel_25/
160	simulation script	lampret	8395d 05h	/or1k/tags/rel_25/
159	synthesis scripts	lampret	8395d 06h	/or1k/tags/rel_25/
158	Initial RTEMS import	chris	8404d 20h	/or1k/tags/rel_25/
157	Update	simons	8411d 23h	/or1k/tags/rel_25/
156	File moved to opcode.	simons	8411d 23h	/or1k/tags/rel_25/
155	Update	simons	8411d 23h	/or1k/tags/rel_25/
154	Updated for new runtime environment	chris	8417d 23h	/or1k/tags/rel_25/
153	Writes to SPR_PC are now enabled	chris	8417d 23h	/or1k/tags/rel_25/
152	Breakpoint exceptions from single step are not printed now.	chris	8417d 23h	/or1k/tags/rel_25/
151	Typo in the previous commit. Sorry.	chris	8417d 23h	/or1k/tags/rel_25/
150	Fixed some single stepping issues	chris	8417d 23h	/or1k/tags/rel_25/
149	Fixed bug where disassemble command caused a segmentation fault	chris	8419d 02h	/or1k/tags/rel_25/
148	Replace single stepping patch that got overwritten	chris	8419d 02h	/or1k/tags/rel_25/
147	Initial checkin of instructions	chris	8419d 18h	/or1k/tags/rel_25/
146	Mofications to work with or1ksim JTAG based simulation	chris	8419d 18h	/or1k/tags/rel_25/