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[/] [or1k/] [tags/] [rel_25/] - Rev 201

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Rev Log message Author Age Path
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8367d 23h /or1k/tags/rel_25/
200 Initial import simons 8371d 06h /or1k/tags/rel_25/
199 Initial import simons 8371d 07h /or1k/tags/rel_25/
198 Moved from testbench.old simons 8373d 18h /or1k/tags/rel_25/
197 This is not used any more. simons 8373d 18h /or1k/tags/rel_25/
196 Configuration SPRs added. simons 8373d 19h /or1k/tags/rel_25/
195 New test added. simons 8373d 19h /or1k/tags/rel_25/
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8374d 03h /or1k/tags/rel_25/
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8374d 03h /or1k/tags/rel_25/
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8374d 12h /or1k/tags/rel_25/
191 Added UART jitter var to sim config chris 8375d 09h /or1k/tags/rel_25/
190 Added jitter initialization chris 8375d 09h /or1k/tags/rel_25/
189 fixed mode handling for tick facility chris 8375d 09h /or1k/tags/rel_25/
188 fixed PIC interrupt controller chris 8375d 09h /or1k/tags/rel_25/
187 minor change to clear pending exception chris 8375d 09h /or1k/tags/rel_25/
186 major change to UART structure chris 8375d 09h /or1k/tags/rel_25/
185 major change to UART code chris 8375d 09h /or1k/tags/rel_25/
184 modified decode for trace debugging chris 8375d 09h /or1k/tags/rel_25/
183 changed special case for PICSR chris 8375d 09h /or1k/tags/rel_25/
182 updated exception handling procedures chris 8375d 09h /or1k/tags/rel_25/

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