OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_25/] - Rev 644

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8226d 19h /or1k/tags/rel_25/
643 Quick bug fix. ivang 8226d 19h /or1k/tags/rel_25/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8226d 19h /or1k/tags/rel_25/
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8226d 19h /or1k/tags/rel_25/
640 Merge profiler and mprofiler with sim. ivang 8226d 20h /or1k/tags/rel_25/
639 MMU cache inhibit bit test added. simons 8229d 11h /or1k/tags/rel_25/
638 TLBTR CI bit is now working properly. simons 8229d 11h /or1k/tags/rel_25/
637 Updated file names. lampret 8229d 12h /or1k/tags/rel_25/
636 Fixed combinational loops. lampret 8229d 12h /or1k/tags/rel_25/
635 Fixed Makefile bug. ivang 8229d 14h /or1k/tags/rel_25/
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.		 ivang 8230d 15h /or1k/tags/rel_25/
633 Bug fix in command line parser. ivang 8230d 16h /or1k/tags/rel_25/
632 profiler and mprofiler merged into sim. ivang 8231d 11h /or1k/tags/rel_25/
631 Real cache access is simulated now. simons 8232d 10h /or1k/tags/rel_25/
630 some bug fixes in store buffer analysis markom 8232d 19h /or1k/tags/rel_25/
629 typo fixed markom 8232d 22h /or1k/tags/rel_25/
627 or32 restored markom 8232d 23h /or1k/tags/rel_25/
626 store buffer added markom 8232d 23h /or1k/tags/rel_25/
625 Bus error bug fixed. Cache routines added. simons 8233d 15h /or1k/tags/rel_25/
624 Added logging of writes/read to/from SPR registers. ivang 8233d 16h /or1k/tags/rel_25/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.