URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [rel_27/] - Rev 893

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Rev	Log message	Author	Age	Path
893	Ethernet tested on xess board.	simons	8058d 06h	/or1k/tags/rel_27/
891	eth_ledc not positioned correctly. Fixed.	mohor	8058d 06h	/or1k/tags/rel_27/
890	Ethernet RXD pins were not positioned correctly.	mohor	8058d 07h	/or1k/tags/rel_27/
889	Modified Ethernet model.	ivang	8058d 12h	/or1k/tags/rel_27/
888	LCD 320x240 configuration added.	simons	8059d 05h	/or1k/tags/rel_27/
887	Some additional instructions fixes.	simons	8059d 15h	/or1k/tags/rel_27/
886	MMU registers reserved fields protected from writing.	simons	8060d 14h	/or1k/tags/rel_27/
885	Some incorrect instructions fixed.	simons	8060d 17h	/or1k/tags/rel_27/
884	code cleaning - a lot of global variables moved to runtime struct	markom	8060d 20h	/or1k/tags/rel_27/
883	cuc updated, cuc prompt parsing; CSM analysis	markom	8061d 15h	/or1k/tags/rel_27/
882	Routine for adjusting read and write delay for devices added.	simons	8063d 18h	/or1k/tags/rel_27/
881	Normally uart rx and tx files should be in the current folder.	mohor	8064d 10h	/or1k/tags/rel_27/
880	Library should not be erased during clean.	mohor	8064d 11h	/or1k/tags/rel_27/
879	Initial version of OpenRISC Custom Unit Compiler added	markom	8066d 14h	/or1k/tags/rel_27/
878	first release of atabug	rherveille	8068d 07h	/or1k/tags/rel_27/
877	ata beta release	rherveille	8068d 07h	/or1k/tags/rel_27/
876	Beta release of ATA simulation	rherveille	8068d 08h	/or1k/tags/rel_27/
875	libgcc is moved here to avoid the mess with the folders.	simons	8068d 20h	/or1k/tags/rel_27/
874	Command for displaying trace buffer added.	simons	8076d 14h	/or1k/tags/rel_27/
873	There is a problem with CRC generation, it has to be fixed in the future.	simons	8087d 20h	/or1k/tags/rel_27/

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[/] [or1k/] [tags/] [rel_27/] - Rev 893

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