OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_27/] [or1200/] [rtl/] - Rev 1186

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1186 Added support for rams with byte write access. simons 7612d 06h /or1k/tags/rel_27/or1200/rtl/
1184 Scan signals mess fixed. simons 7618d 23h /or1k/tags/rel_27/or1200/rtl/
1179 BIST interface added for Artisan memory instances. simons 7627d 02h /or1k/tags/rel_27/or1200/rtl/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7693d 13h /or1k/tags/rel_27/or1200/rtl/
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7736d 15h /or1k/tags/rel_27/or1200/rtl/
1155 No functional change. Only added customization for exception vectors. lampret 7739d 17h /or1k/tags/rel_27/or1200/rtl/
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7752d 19h /or1k/tags/rel_27/or1200/rtl/
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7752d 19h /or1k/tags/rel_27/or1200/rtl/
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7753d 14h /or1k/tags/rel_27/or1200/rtl/
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7753d 14h /or1k/tags/rel_27/or1200/rtl/
1130 RFRAM type always need to be defined. lampret 7753d 14h /or1k/tags/rel_27/or1200/rtl/
1129 Added Altera LPM RAMs. Changed generic RAM output when OE inactive. lampret 7753d 14h /or1k/tags/rel_27/or1200/rtl/
1112 Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs] lampret 7828d 12h /or1k/tags/rel_27/or1200/rtl/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7873d 07h /or1k/tags/rel_27/or1200/rtl/
1083 SB mem width fixed. simons 7905d 02h /or1k/tags/rel_27/or1200/rtl/
1079 RAMs wrong connected to the BIST scan chain. mohor 7913d 23h /or1k/tags/rel_27/or1200/rtl/
1078 Previous check-in was done by mistake. mohor 7914d 01h /or1k/tags/rel_27/or1200/rtl/
1077 Signal scanb_sen renamed to scanb_en. mohor 7914d 01h /or1k/tags/rel_27/or1200/rtl/
1069 Signal scanb_eni renamed to scanb_en mohor 7917d 17h /or1k/tags/rel_27/or1200/rtl/
1063 Added BIST scan. Special VS RAMs need to be used to implement BIST. lampret 7924d 20h /or1k/tags/rel_27/or1200/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.