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Rev Log message Author Age Path
203 Updated from xess branch. lampret 8355d 19h /or1k/tags/rel_29/
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf
erez 8361d 02h /or1k/tags/rel_29/
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8361d 02h /or1k/tags/rel_29/
200 Initial import simons 8364d 10h /or1k/tags/rel_29/
199 Initial import simons 8364d 11h /or1k/tags/rel_29/
198 Moved from testbench.old simons 8366d 22h /or1k/tags/rel_29/
197 This is not used any more. simons 8366d 22h /or1k/tags/rel_29/
196 Configuration SPRs added. simons 8366d 22h /or1k/tags/rel_29/
195 New test added. simons 8366d 22h /or1k/tags/rel_29/
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.
chris 8367d 06h /or1k/tags/rel_29/
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.
chris 8367d 07h /or1k/tags/rel_29/
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.
chris 8367d 16h /or1k/tags/rel_29/
191 Added UART jitter var to sim config chris 8368d 12h /or1k/tags/rel_29/
190 Added jitter initialization chris 8368d 12h /or1k/tags/rel_29/
189 fixed mode handling for tick facility chris 8368d 12h /or1k/tags/rel_29/
188 fixed PIC interrupt controller chris 8368d 12h /or1k/tags/rel_29/
187 minor change to clear pending exception chris 8368d 12h /or1k/tags/rel_29/
186 major change to UART structure chris 8368d 12h /or1k/tags/rel_29/
185 major change to UART code chris 8368d 12h /or1k/tags/rel_29/
184 modified decode for trace debugging chris 8368d 12h /or1k/tags/rel_29/

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