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[/] [or1k/] [tags/] [rel_5/] - Rev 791

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Rev Log message Author Age Path
791 Fixed some ports in instnatiations that were removed from the modules lampret 8125d 05h /or1k/tags/rel_5/
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8125d 05h /or1k/tags/rel_5/
789 Added response from memory controller (addr 0x60000000) lampret 8125d 06h /or1k/tags/rel_5/
788 Some of the warnings fixed. lampret 8125d 06h /or1k/tags/rel_5/
787 Added romfs.tgz lampret 8126d 01h /or1k/tags/rel_5/
786 Moved UCF constraint file to the backend directory. lampret 8126d 01h /or1k/tags/rel_5/
785 Added XSV specific documentation. lampret 8126d 01h /or1k/tags/rel_5/
784 Added soem missing files. lampret 8126d 01h /or1k/tags/rel_5/
783 Added sim directory and sub files/dirs. lampret 8126d 01h /or1k/tags/rel_5/
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8126d 01h /or1k/tags/rel_5/
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8126d 01h /or1k/tags/rel_5/
780 Added libraries. lampret 8126d 01h /or1k/tags/rel_5/
779 Added bench directory lampret 8126d 02h /or1k/tags/rel_5/
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8126d 02h /or1k/tags/rel_5/
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8126d 02h /or1k/tags/rel_5/
776 Updated defines. lampret 8126d 02h /or1k/tags/rel_5/
775 Optimized cache controller FSM. lampret 8126d 03h /or1k/tags/rel_5/
774 Removed old files. lampret 8126d 03h /or1k/tags/rel_5/
773 Changing directory structure ... lampret 8126d 04h /or1k/tags/rel_5/
772 Changing directory structure ... lampret 8126d 04h /or1k/tags/rel_5/

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