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[/] [or1k/] [tags/] [rel_7/] - Rev 1022

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Rev Log message Author Age Path
1022 As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy. lampret 8000d 06h /or1k/tags/rel_7/
1021 *** empty log message *** rherveille 8004d 09h /or1k/tags/rel_7/
1020 Fixed several bugs
Working version, tested on Bender hardware		 rherveille 8004d 09h /or1k/tags/rel_7/
1019 fixed some bugs detected by Bender hardware rherveille 8004d 09h /or1k/tags/rel_7/
1018 TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2) simons 8004d 16h /or1k/tags/rel_7/
1017 TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2) simons 8004d 16h /or1k/tags/rel_7/
1016 64 bytes is the smallest packet size. simons 8005d 08h /or1k/tags/rel_7/
1015 Host type was not recognized. simons 8005d 18h /or1k/tags/rel_7/
1014 added _JBLEN definition for or1k ivang 8006d 08h /or1k/tags/rel_7/
1013 ORP architecture supported. simons 8006d 10h /or1k/tags/rel_7/
1011 Removed some commented RTL. Fixed SR/ESR flag bug. lampret 8007d 03h /or1k/tags/rel_7/
1010 Import ivang 8011d 06h /or1k/tags/rel_7/
1009 Import ivang 8011d 06h /or1k/tags/rel_7/
1008 Import ivang 8011d 07h /or1k/tags/rel_7/
1007 Import ivang 8011d 07h /or1k/tags/rel_7/
1006 Import ivang 8011d 07h /or1k/tags/rel_7/
1005 Import ivang 8011d 07h /or1k/tags/rel_7/
1004 Now every ramdisk image should have init program. simons 8011d 15h /or1k/tags/rel_7/
1003 cuc temporary files are deleted upon exiting markom 8011d 16h /or1k/tags/rel_7/
1002 Now every ramdisk image should have init program. simons 8011d 16h /or1k/tags/rel_7/

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