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[/] [or1k/] [tags/] [rel_7/] - Rev 992

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Rev Log message Author Age Path
992 A bug when cache enabled and bus error comes fixed. simons 7996d 03h /or1k/tags/rel_7/
991 Different memory controller. simons 7996d 03h /or1k/tags/rel_7/
990 Test is now complete. simons 7996d 03h /or1k/tags/rel_7/
989 c++ is making problems so, for now, it is excluded. simons 7997d 11h /or1k/tags/rel_7/
988 ORP architecture supported. simons 7998d 02h /or1k/tags/rel_7/
987 ORP architecture supported. simons 7998d 09h /or1k/tags/rel_7/
986 outputs out of function are not registered anymore markom 7998d 10h /or1k/tags/rel_7/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7998d 22h /or1k/tags/rel_7/
984 Disable SB until it is tested lampret 7998d 22h /or1k/tags/rel_7/
983 First checkin lampret 7999d 00h /or1k/tags/rel_7/
982 Moved to sim/bin lampret 7999d 00h /or1k/tags/rel_7/
981 First checkin. lampret 7999d 00h /or1k/tags/rel_7/
980 Removed sim.tcl that shouldn't be here. lampret 7999d 00h /or1k/tags/rel_7/
979 Removed old test case binaries. lampret 7999d 00h /or1k/tags/rel_7/
978 Added variable delay for SRAM. lampret 7999d 00h /or1k/tags/rel_7/
977 Added store buffer. lampret 7999d 00h /or1k/tags/rel_7/
976 Added store buffer lampret 7999d 00h /or1k/tags/rel_7/
975 First checkin lampret 7999d 00h /or1k/tags/rel_7/
974 Enabled what works on or1ksim and disabled other tests. lampret 7999d 02h /or1k/tags/rel_7/
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 8001d 06h /or1k/tags/rel_7/

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