OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_9/] - Rev 647

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
647 some changes to fb to make it compatible with HW markom 8195d 07h /or1k/tags/rel_9/
646 some bugs fixed markom 8195d 09h /or1k/tags/rel_9/
645 simple frame buffer peripheral with test added markom 8195d 13h /or1k/tags/rel_9/
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8196d 08h /or1k/tags/rel_9/
643 Quick bug fix. ivang 8196d 08h /or1k/tags/rel_9/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8196d 08h /or1k/tags/rel_9/
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8196d 08h /or1k/tags/rel_9/
640 Merge profiler and mprofiler with sim. ivang 8196d 10h /or1k/tags/rel_9/
639 MMU cache inhibit bit test added. simons 8199d 00h /or1k/tags/rel_9/
638 TLBTR CI bit is now working properly. simons 8199d 00h /or1k/tags/rel_9/
637 Updated file names. lampret 8199d 01h /or1k/tags/rel_9/
636 Fixed combinational loops. lampret 8199d 02h /or1k/tags/rel_9/
635 Fixed Makefile bug. ivang 8199d 03h /or1k/tags/rel_9/
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.		 ivang 8200d 05h /or1k/tags/rel_9/
633 Bug fix in command line parser. ivang 8200d 05h /or1k/tags/rel_9/
632 profiler and mprofiler merged into sim. ivang 8201d 00h /or1k/tags/rel_9/
631 Real cache access is simulated now. simons 8201d 23h /or1k/tags/rel_9/
630 some bug fixes in store buffer analysis markom 8202d 08h /or1k/tags/rel_9/
629 typo fixed markom 8202d 12h /or1k/tags/rel_9/
627 or32 restored markom 8202d 12h /or1k/tags/rel_9/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.