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[/] [or1k/] [tags/] [rel_9/] - Rev 977

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Rev	Log message	Author	Age	Path
977	Added store buffer.	lampret	7999d 16h	/or1k/tags/rel_9/
976	Added store buffer	lampret	7999d 16h	/or1k/tags/rel_9/
975	First checkin	lampret	7999d 16h	/or1k/tags/rel_9/
974	Enabled what works on or1ksim and disabled other tests.	lampret	7999d 18h	/or1k/tags/rel_9/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	8001d 22h	/or1k/tags/rel_9/
972	Interrupt suorces fixed.	simons	8001d 22h	/or1k/tags/rel_9/
971	Now even keyboard test passes.	simons	8002d 01h	/or1k/tags/rel_9/
970	Testbench is now running on ORP architecture platform.	simons	8002d 14h	/or1k/tags/rel_9/
969	Checking in except directory.	lampret	8003d 05h	/or1k/tags/rel_9/
968	Checking in utils directory.	lampret	8003d 06h	/or1k/tags/rel_9/
967	Checking in mul directory.	lampret	8003d 06h	/or1k/tags/rel_9/
966	Checking in cbasic directory.	lampret	8003d 06h	/or1k/tags/rel_9/
965	Checking in basic directory.	lampret	8003d 06h	/or1k/tags/rel_9/
964	Checking in support directory.	lampret	8003d 06h	/or1k/tags/rel_9/
962	Fixed Xilinx trace buffer address. REported by Taylor Su.	lampret	8003d 06h	/or1k/tags/rel_9/
961	uart16550 RTL files renamed/added/removed.	lampret	8003d 06h	/or1k/tags/rel_9/
960	Directory cleanup.	lampret	8003d 06h	/or1k/tags/rel_9/
959	Fixed size of generic flash/sram to exactly 2MB	lampret	8004d 05h	/or1k/tags/rel_9/
958	Disabled ITLB translation when 1) doing access to ITLB SPRs or 2) crossing page. This modification was tested only with parts of IMMU test - remaining test cases needs to be run.	lampret	8004d 05h	/or1k/tags/rel_9/
957	Flash at 0x04000000 RAM at 0x00000000. Only MMU test works.	simons	8004d 15h	/or1k/tags/rel_9/

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[/] [or1k/] [tags/] [rel_9/] - Rev 977

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