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[/] [or1k/] [tags/] [rel_9/] [or1200/] - Rev 1131

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Rev Log message Author Age Path
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7734d 14h /or1k/tags/rel_9/or1200/
1130 RFRAM type always need to be defined. lampret 7734d 14h /or1k/tags/rel_9/or1200/
1129 Added Altera LPM RAMs. Changed generic RAM output when OE inactive. lampret 7734d 14h /or1k/tags/rel_9/or1200/
1112 Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs] lampret 7809d 12h /or1k/tags/rel_9/or1200/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7854d 07h /or1k/tags/rel_9/or1200/
1083 SB mem width fixed. simons 7886d 02h /or1k/tags/rel_9/or1200/
1079 RAMs wrong connected to the BIST scan chain. mohor 7894d 23h /or1k/tags/rel_9/or1200/
1078 Previous check-in was done by mistake. mohor 7895d 00h /or1k/tags/rel_9/or1200/
1077 Signal scanb_sen renamed to scanb_en. mohor 7895d 01h /or1k/tags/rel_9/or1200/
1069 Signal scanb_eni renamed to scanb_en mohor 7898d 17h /or1k/tags/rel_9/or1200/
1063 Added BIST scan. Special VS RAMs need to be used to implement BIST. lampret 7905d 20h /or1k/tags/rel_9/or1200/
1055 Removed obsolete comment. lampret 7937d 12h /or1k/tags/rel_9/or1200/
1054 Fixed a combinational loop. lampret 7937d 12h /or1k/tags/rel_9/or1200/
1053 Disabled cache inhibit atttribute. lampret 7937d 12h /or1k/tags/rel_9/or1200/
1040 Updated the script. lampret 7944d 18h /or1k/tags/rel_9/or1200/
1039 Added linter directory. lampret 7944d 18h /or1k/tags/rel_9/or1200/
1038 Fixed a typo, reported by Taylor Su. lampret 7944d 20h /or1k/tags/rel_9/or1200/
1037 First import of the new synopsys DC scripts. lampret 7944d 21h /or1k/tags/rel_9/or1200/
1036 Removed old synthesis scripts. lampret 7944d 21h /or1k/tags/rel_9/or1200/
1035 Added optional l.div/l.divu insns. By default they are disabled. lampret 7945d 10h /or1k/tags/rel_9/or1200/

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