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[/] [or1k/] [tags/] [stable/] [or1200/] - Rev 392

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Rev Log message Author Age Path
392 This commit was manufactured by cvs2svn to create tag 'stable'. 8253d 17h /or1k/tags/stable/or1200/
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8253d 17h /or1k/tags/stable/or1200/
390 Changed instantiation name of VS RAMs. lampret 8253d 18h /or1k/tags/stable/or1200/
387 Now FPGA and ASIC target are separate. lampret 8253d 20h /or1k/tags/stable/or1200/
386 Fixed VS RAM instantiation - again. lampret 8253d 20h /or1k/tags/stable/or1200/
370 Program counter divided to PPC and NPC. simons 8257d 18h /or1k/tags/stable/or1200/
367 Changed DSR/DRR behavior and exception detection. lampret 8258d 07h /or1k/tags/stable/or1200/
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8259d 02h /or1k/tags/stable/or1200/
360 Added OR1200_REGISTERED_INPUTS. lampret 8260d 18h /or1k/tags/stable/or1200/
359 Added optional sampling of inputs. lampret 8260d 18h /or1k/tags/stable/or1200/
358 Fixed virtual silicon single-port rams instantiation. lampret 8260d 18h /or1k/tags/stable/or1200/
357 Fixed dbg_is_o assignment width. lampret 8260d 18h /or1k/tags/stable/or1200/
356 Break point bug fixed simons 8260d 21h /or1k/tags/stable/or1200/
354 Fixed width of du_except. lampret 8261d 15h /or1k/tags/stable/or1200/
353 Cashes disabled. simons 8262d 01h /or1k/tags/stable/or1200/
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8263d 04h /or1k/tags/stable/or1200/
351 Fixed some l.trap typos. lampret 8263d 06h /or1k/tags/stable/or1200/
350 For GDB changed single stepping and disabled trap exception. lampret 8263d 07h /or1k/tags/stable/or1200/
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8268d 06h /or1k/tags/stable/or1200/
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8268d 06h /or1k/tags/stable/or1200/

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