OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_1_0/] [or1ksim/] [debug/] - Rev 1780

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5581d 13h /or1k/tags/stable_0_1_0/or1ksim/debug/
1357 This commit was manufactured by cvs2svn to create tag 'stable_0_1_0'. 7070d 02h /or1k/tags/stable_0_1_0/or1ksim/debug/
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7070d 02h /or1k/tags/stable_0_1_0/or1ksim/debug/
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7071d 18h /or1k/tags/stable_0_1_0/or1ksim/debug/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7071d 18h /or1k/tags/stable_0_1_0/or1ksim/debug/
1347 Remove backup file nogj 7083d 05h /or1k/tags/stable_0_1_0/or1ksim/debug/
1308 Gyorgy Jeney: extensive cleanup phoenix 7276d 13h /or1k/tags/stable_0_1_0/or1ksim/debug/
1249 Downgrading back to automake-1.4 lampret 7441d 13h /or1k/tags/stable_0_1_0/or1ksim/debug/
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7443d 21h /or1k/tags/stable_0_1_0/or1ksim/debug/
1151 *** empty log message *** phoenix 7740d 20h /or1k/tags/stable_0_1_0/or1ksim/debug/
1147 remove unneeded include phoenix 7741d 09h /or1k/tags/stable_0_1_0/or1ksim/debug/
1117 Ignore generated files for CVS purposes sfurman 7784d 13h /or1k/tags/stable_0_1_0/or1ksim/debug/
997 PRINTF should be used instead of printf; command redirection repaired markom 7973d 03h /or1k/tags/stable_0_1_0/or1ksim/debug/
970 Testbench is now running on ORP architecture platform. simons 7980d 14h /or1k/tags/stable_0_1_0/or1ksim/debug/
884 code cleaning - a lot of global variables moved to runtime struct markom 8017d 02h /or1k/tags/stable_0_1_0/or1ksim/debug/
876 Beta release of ATA simulation rherveille 8024d 13h /or1k/tags/stable_0_1_0/or1ksim/debug/
693 exception info is outputted only in verbose mode markom 8157d 04h /or1k/tags/stable_0_1_0/or1ksim/debug/
643 Quick bug fix. ivang 8172d 22h /or1k/tags/stable_0_1_0/or1ksim/debug/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8172d 23h /or1k/tags/stable_0_1_0/or1ksim/debug/
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8188d 13h /or1k/tags/stable_0_1_0/or1ksim/debug/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.