OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_1_0/] [or1ksim/] [testbench/] - Rev 411

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
411 acv uart testsuite now works (without modem test) markom 8280d 18h /or1k/tags/stable_0_1_0/or1ksim/testbench/
410 MMU test added. simons 8281d 12h /or1k/tags/stable_0_1_0/or1ksim/testbench/
409 some minor changes to or1ksim; Testbench except.s modified. Interrupt test almost finished for uart ACV. markom 8281d 18h /or1k/tags/stable_0_1_0/or1ksim/testbench/
406 Renamed ethernet's RX_BD_ADR to RX_BD_NUM erez 8282d 17h /or1k/tags/stable_0_1_0/or1ksim/testbench/
396 added missing file markom 8289d 18h /or1k/tags/stable_0_1_0/or1ksim/testbench/
395 removed obsolete dependency and history from cpu section markom 8289d 20h /or1k/tags/stable_0_1_0/or1ksim/testbench/
385 check testbench now modified to work with new report output markom 8290d 15h /or1k/tags/stable_0_1_0/or1ksim/testbench/
383 modified simmem.cfg structure! ADD markom 8290d 16h /or1k/tags/stable_0_1_0/or1ksim/testbench/
381 number display is more strict with 0x prefix with hex numbers markom 8290d 18h /or1k/tags/stable_0_1_0/or1ksim/testbench/
380 all tests pass check markom 8290d 18h /or1k/tags/stable_0_1_0/or1ksim/testbench/
378 cleanup in testbench; pc divided into ppc and npc markom 8290d 20h /or1k/tags/stable_0_1_0/or1ksim/testbench/
376 int.c and int.h are general enough and should be useful for other tests beside uos markom 8290d 20h /or1k/tags/stable_0_1_0/or1ksim/testbench/
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8291d 18h /or1k/tags/stable_0_1_0/or1ksim/testbench/
369 Configuration command description added. simons 8294d 19h /or1k/tags/stable_0_1_0/or1ksim/testbench/
361 set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts markom 8296d 20h /or1k/tags/stable_0_1_0/or1ksim/testbench/
355 uart VAPI model improved; changes to MC and eth. markom 8297d 17h /or1k/tags/stable_0_1_0/or1ksim/testbench/
349 Some bugs regarding cache simulation fixed. simons 8301d 08h /or1k/tags/stable_0_1_0/or1ksim/testbench/
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8303d 17h /or1k/tags/stable_0_1_0/or1ksim/testbench/
343 Small touches to test programs erez 8303d 19h /or1k/tags/stable_0_1_0/or1ksim/testbench/
342 added exception vectors to support and modified section names markom 8304d 16h /or1k/tags/stable_0_1_0/or1ksim/testbench/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.