OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 1622

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1622 First Import of uClinux for RC20x board jcastillo 6757d 20h /or1k/tags/stable_0_2_0/
1621 First Impot jcastillo 6757d 21h /or1k/tags/stable_0_2_0/
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6762d 17h /or1k/tags/stable_0_2_0/
1619 Fixed types in function declaration jcastillo 6762d 22h /or1k/tags/stable_0_2_0/
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6763d 04h /or1k/tags/stable_0_2_0/
1617 *** empty log message *** phoenix 6763d 04h /or1k/tags/stable_0_2_0/
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6763d 04h /or1k/tags/stable_0_2_0/
1615 *** empty log message *** phoenix 6763d 05h /or1k/tags/stable_0_2_0/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6773d 05h /or1k/tags/stable_0_2_0/
1613 change default phoenix 6778d 14h /or1k/tags/stable_0_2_0/
1612 major optimizations for or32 target phoenix 6778d 15h /or1k/tags/stable_0_2_0/
1610 Update ChangeLog nogj 6781d 16h /or1k/tags/stable_0_2_0/
1609 0.2.0-rc2 release nogj 6781d 17h /or1k/tags/stable_0_2_0/
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6782d 11h /or1k/tags/stable_0_2_0/
1607 Don't drop cycles from the scheduler nogj 6782d 11h /or1k/tags/stable_0_2_0/
1606 fix uninitialized reads phoenix 6782d 16h /or1k/tags/stable_0_2_0/
1605 Execute l.ff1 instruction nogj 6789d 11h /or1k/tags/stable_0_2_0/
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6789d 11h /or1k/tags/stable_0_2_0/
1603 Accept EM_OPENRISC as a valid machine nogj 6790d 15h /or1k/tags/stable_0_2_0/
1602 Corrected description of l.sfXXui (arch manual had a wrong description compared to behavior implemented in or1ksim/gcc/or1200). Removed Atomicity chapter. lampret 6791d 14h /or1k/tags/stable_0_2_0/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.