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[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 170

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Rev Log message Author Age Path
170 Added cfg regs. Moved all defines into one defines.v file. More cleanup. lampret 8371d 03h /or1k/tags/stable_0_2_0/
169 Fixed memory cells. Moved monitor.h into monitor.v lampret 8371d 03h /or1k/tags/stable_0_2_0/
168 Major clean-up. lampret 8374d 17h /or1k/tags/stable_0_2_0/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8375d 16h /or1k/tags/stable_0_2_0/
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8393d 03h /or1k/tags/stable_0_2_0/
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8393d 03h /or1k/tags/stable_0_2_0/
164 *** empty log message *** lampret 8395d 05h /or1k/tags/stable_0_2_0/
163 Forgot files.f file. lampret 8395d 06h /or1k/tags/stable_0_2_0/
162 Benches (under development). lampret 8395d 06h /or1k/tags/stable_0_2_0/
161 Development version of RTL. Libraries are missing. lampret 8395d 06h /or1k/tags/stable_0_2_0/
160 simulation script lampret 8395d 06h /or1k/tags/stable_0_2_0/
159 synthesis scripts lampret 8395d 06h /or1k/tags/stable_0_2_0/
158 Initial RTEMS import chris 8404d 20h /or1k/tags/stable_0_2_0/
157 Update simons 8411d 23h /or1k/tags/stable_0_2_0/
156 File moved to opcode. simons 8411d 23h /or1k/tags/stable_0_2_0/
155 Update simons 8411d 23h /or1k/tags/stable_0_2_0/
154 Updated for new runtime environment chris 8417d 23h /or1k/tags/stable_0_2_0/
153 Writes to SPR_PC are now enabled chris 8417d 23h /or1k/tags/stable_0_2_0/
152 Breakpoint exceptions from single step are not printed now. chris 8417d 23h /or1k/tags/stable_0_2_0/
151 Typo in the previous commit. Sorry. chris 8417d 23h /or1k/tags/stable_0_2_0/

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