OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim/] - Rev 48

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
48 Added CCR. lampret 8787d 03h /or1k/tags/stable_0_2_0/or1ksim/
47 Added interrupt recognition and better memory dump. lampret 8787d 03h /or1k/tags/stable_0_2_0/or1ksim/
46 Added srand(). lampret 8787d 04h /or1k/tags/stable_0_2_0/or1ksim/
45 Added NONE. lampret 8787d 04h /or1k/tags/stable_0_2_0/or1ksim/
44 %s bug fixed. lampret 8792d 09h /or1k/tags/stable_0_2_0/or1ksim/
43 SUPV bit from SR is now saved into EPCR bit 0. lampret 8797d 12h /or1k/tags/stable_0_2_0/or1ksim/
42 Bug fix. Only symbols with names shorter than 9 characters are loaded. lampret 8797d 12h /or1k/tags/stable_0_2_0/or1ksim/
41 Bug fix. Now all COFF sections are loaded not just .text. lampret 8798d 10h /or1k/tags/stable_0_2_0/or1ksim/
38 Virtual machine at the moment. lampret 8798d 15h /or1k/tags/stable_0_2_0/or1ksim/
37 STACK_SIZE is not properly used (will be removed soon). lampret 8798d 15h /or1k/tags/stable_0_2_0/or1ksim/
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).		 lampret 8798d 15h /or1k/tags/stable_0_2_0/or1ksim/
35 SLP hooks. lampret 8798d 15h /or1k/tags/stable_0_2_0/or1ksim/
34 Started with SLP (not finished yet). lampret 8798d 15h /or1k/tags/stable_0_2_0/or1ksim/
33 Handling of or1k exceptions. lampret 8802d 14h /or1k/tags/stable_0_2_0/or1ksim/
32 Interrupt recognition. lampret 8802d 14h /or1k/tags/stable_0_2_0/or1ksim/
31 16450 serial UART device. lampret 8802d 16h /or1k/tags/stable_0_2_0/or1ksim/
30 Updated SPRs, exceptions. Added 16450 device. lampret 8802d 16h /or1k/tags/stable_0_2_0/or1ksim/
29 Adding OR16/OR32 insn decoder. lampret 8817d 14h /or1k/tags/stable_0_2_0/or1ksim/
28 Adding COFF loader. lampret 8817d 14h /or1k/tags/stable_0_2_0/or1ksim/
27 Updated. lampret 8832d 18h /or1k/tags/stable_0_2_0/or1ksim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.