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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 1341

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Rev Log message Author Age Path
1341 Mark wich operand is the destination operand in the architechture definition nogj 7066d 18h /or1k/tags/stable_0_2_0_rc1/
1339 revert to the old l.sfxxi behavior phoenix 7080d 20h /or1k/tags/stable_0_2_0_rc1/
1338 l.ff1 instruction added andreje 7082d 15h /or1k/tags/stable_0_2_0_rc1/
1337 du_hwbkpt disabled when debug unit not implemented andreje 7086d 22h /or1k/tags/stable_0_2_0_rc1/
1336 sign/zero extension for l.sfxxi instructions corrected andreje 7086d 22h /or1k/tags/stable_0_2_0_rc1/
1335 flag for l.cmov instruction added andreje 7086d 22h /or1k/tags/stable_0_2_0_rc1/
1334 l.ff1 and l.cmov instructions added andreje 7086d 22h /or1k/tags/stable_0_2_0_rc1/
1333 gcc 3.4 compile fix phoenix 7097d 16h /or1k/tags/stable_0_2_0_rc1/
1332 gcc 3.4.3 compile fix phoenix 7101d 10h /or1k/tags/stable_0_2_0_rc1/
1331 jtag bugfix phoenix 7106d 10h /or1k/tags/stable_0_2_0_rc1/
1330 jtag bugfix phoenix 7106d 10h /or1k/tags/stable_0_2_0_rc1/
1329 Synplify synthesis script first import jcastillo 7110d 20h /or1k/tags/stable_0_2_0_rc1/
1327 Firt import of OR1200 over Celoxica RC203 platform jcastillo 7111d 14h /or1k/tags/stable_0_2_0_rc1/
1325 Initial import of uClibc-0.9.26 phoenix 7142d 08h /or1k/tags/stable_0_2_0_rc1/
1324 memory access functions fixes phoenix 7164d 09h /or1k/tags/stable_0_2_0_rc1/
1323 Adrian Wise: or1ksim bugfix & Solaris build phoenix 7165d 15h /or1k/tags/stable_0_2_0_rc1/
1322 Christian Krauses bugfixes phoenix 7166d 17h /or1k/tags/stable_0_2_0_rc1/
1321 some tests rely on exit(0) as a last std output text to pass phoenix 7168d 08h /or1k/tags/stable_0_2_0_rc1/
1320 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7170d 08h /or1k/tags/stable_0_2_0_rc1/
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7170d 08h /or1k/tags/stable_0_2_0_rc1/

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