OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 638

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
638 TLBTR CI bit is now working properly. simons 8221d 19h /or1k/tags/stable_0_2_0_rc1/
637 Updated file names. lampret 8221d 20h /or1k/tags/stable_0_2_0_rc1/
636 Fixed combinational loops. lampret 8221d 20h /or1k/tags/stable_0_2_0_rc1/
635 Fixed Makefile bug. ivang 8221d 22h /or1k/tags/stable_0_2_0_rc1/
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.
ivang 8222d 23h /or1k/tags/stable_0_2_0_rc1/
633 Bug fix in command line parser. ivang 8223d 00h /or1k/tags/stable_0_2_0_rc1/
632 profiler and mprofiler merged into sim. ivang 8223d 19h /or1k/tags/stable_0_2_0_rc1/
631 Real cache access is simulated now. simons 8224d 18h /or1k/tags/stable_0_2_0_rc1/
630 some bug fixes in store buffer analysis markom 8225d 03h /or1k/tags/stable_0_2_0_rc1/
629 typo fixed markom 8225d 06h /or1k/tags/stable_0_2_0_rc1/
627 or32 restored markom 8225d 07h /or1k/tags/stable_0_2_0_rc1/
626 store buffer added markom 8225d 07h /or1k/tags/stable_0_2_0_rc1/
625 Bus error bug fixed. Cache routines added. simons 8225d 23h /or1k/tags/stable_0_2_0_rc1/
624 Added logging of writes/read to/from SPR registers. ivang 8225d 23h /or1k/tags/stable_0_2_0_rc1/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8226d 01h /or1k/tags/stable_0_2_0_rc1/
622 Cache test works on hardware. simons 8226d 04h /or1k/tags/stable_0_2_0_rc1/
621 Cache test works on hardware. simons 8226d 05h /or1k/tags/stable_0_2_0_rc1/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8226d 05h /or1k/tags/stable_0_2_0_rc1/
619 all test pass, after newest changes markom 8226d 06h /or1k/tags/stable_0_2_0_rc1/
618 Fixed display of new 'void' nop insns. lampret 8226d 14h /or1k/tags/stable_0_2_0_rc1/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.