URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 95

Rev	Log message	Author	Age	Path
95	Update.	lampret	8545d 16h	/or1k/tags/stable_0_2_0_rc1/
94	Update.	lampret	8565d 16h	/or1k/tags/stable_0_2_0_rc1/
93	Adding uos.	lampret	8565d 16h	/or1k/tags/stable_0_2_0_rc1/
92	Tick timer.	lampret	8565d 19h	/or1k/tags/stable_0_2_0_rc1/
91	Tick timer facility.	lampret	8565d 19h	/or1k/tags/stable_0_2_0_rc1/
90	Added tick timer.	lampret	8565d 21h	/or1k/tags/stable_0_2_0_rc1/
89	Minor changes.	lampret	8566d 17h	/or1k/tags/stable_0_2_0_rc1/
88	Update.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
87	Files required for creation of html files.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
86	Added dh command.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
85	Added dumphex.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
84	Update.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
83	Updates.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
82	Changed pctemp to pcnext.	lampret	8567d 04h	/or1k/tags/stable_0_2_0_rc1/
80	First import.	lampret	8594d 23h	/or1k/tags/stable_0_2_0_rc1/
79	Data and instruction cache simulation added.	lampret	8596d 20h	/or1k/tags/stable_0_2_0_rc1/
78	(i/d)tlb_status	lampret	8720d 10h	/or1k/tags/stable_0_2_0_rc1/
77	Regular update.	lampret	8720d 10h	/or1k/tags/stable_0_2_0_rc1/
76	regular update	lampret	8720d 10h	/or1k/tags/stable_0_2_0_rc1/
75	simgetstr added. eval_mem32 replaced with evalsim_mem32.	lampret	8720d 10h	/or1k/tags/stable_0_2_0_rc1/