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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 991

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Rev	Log message	Author	Age	Path
991	Different memory controller.	simons	7994d 17h	/or1k/tags/stable_0_2_0_rc1/
990	Test is now complete.	simons	7994d 17h	/or1k/tags/stable_0_2_0_rc1/
989	c++ is making problems so, for now, it is excluded.	simons	7996d 01h	/or1k/tags/stable_0_2_0_rc1/
988	ORP architecture supported.	simons	7996d 16h	/or1k/tags/stable_0_2_0_rc1/
987	ORP architecture supported.	simons	7997d 00h	/or1k/tags/stable_0_2_0_rc1/
986	outputs out of function are not registered anymore	markom	7997d 00h	/or1k/tags/stable_0_2_0_rc1/
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	7997d 12h	/or1k/tags/stable_0_2_0_rc1/
984	Disable SB until it is tested	lampret	7997d 12h	/or1k/tags/stable_0_2_0_rc1/
983	First checkin	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
982	Moved to sim/bin	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
981	First checkin.	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
980	Removed sim.tcl that shouldn't be here.	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
979	Removed old test case binaries.	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
978	Added variable delay for SRAM.	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
977	Added store buffer.	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
976	Added store buffer	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
975	First checkin	lampret	7997d 14h	/or1k/tags/stable_0_2_0_rc1/
974	Enabled what works on or1ksim and disabled other tests.	lampret	7997d 16h	/or1k/tags/stable_0_2_0_rc1/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	7999d 20h	/or1k/tags/stable_0_2_0_rc1/
972	Interrupt suorces fixed.	simons	7999d 21h	/or1k/tags/stable_0_2_0_rc1/

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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 991

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