OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [gen_or1k_isa/] [sources/] - Rev 1350

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7076d 09h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1346 Remove the global op structure nogj 7089d 13h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7089d 13h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7089d 13h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1338 l.ff1 instruction added andreje 7105d 11h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1309 removed includes phoenix 7278d 06h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1308 Gyorgy Jeney: extensive cleanup phoenix 7281d 04h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7303d 04h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1286 Changed desciption of the l.cust5 insns lampret 7352d 07h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1285 Changed desciption of the l.cust5 insns lampret 7352d 07h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1169 Added support for l.addc instruction. csanchez 7665d 07h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1114 Added cvs log keywords lampret 7819d 23h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1113 Typos by Maria Bolado lampret 7819d 23h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1108 Errors fixed. lampret 7835d 06h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1107 Updatded and improved formatting. lampret 7835d 07h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
1034 Fixed encoding for l.div/l.divu. lampret 7962d 00h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
955 typos and grammar fixed markom 7988d 12h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8027d 10h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
801 l.muli instruction added markom 8119d 14h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/
722 floating point registers are obsolete; GPRs should be used instead markom 8147d 13h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.