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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 15

Rev	Log message	Author	Age	Path
15	Initial revision.	jrydberg	8870d 20h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
13	Rebuild of the generated files.	jrydberg	8872d 01h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
12	Added information to the section about how to configure and compile the package.	jrydberg	8872d 01h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
11	Rebuild from configure.in.	jrydberg	8872d 01h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
10	Support for both architectures. Specify architecture with the --target option.	jrydberg	8872d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
9	Added support for OpenRISC 100 and DLX.	jrydberg	8872d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
8	Initial revision.	jrydberg	8872d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
7	Major update of the enviorment. Now uses autoconf and automake. The simulator uses readline aswell to get input from the user. A number of new files added, some modified. The libc directory is now called support.	jrydberg	8872d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8872d 20h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
5	Data and instruction cache simulation added.	lampret	8872d 20h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
4	no message	lampret	8923d 00h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
3	This commit was generated by cvs2svn to compensate for changes in r2, which included commits to RCS files with non-trunk default branches.	cvs	8998d 13h	/or1k/tags/stable_0_2_0_rc1/or1ksim/