OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 910

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
910 No arith and overflow flags by default. lampret 7992d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/
909 Bug fix. lampret 7993d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
908 busy signal added markom 7998d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/
907 function calling generation; not tested yet markom 7998d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/
906 function dependency analysis added markom 7998d 06h /or1k/tags/stable_0_2_0_rc1/or1ksim/
905 type 2 bb joining; few small bugs fixed; cmov edge condition added markom 7999d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/
904 duplicated memory loads (same location) can be removed markom 7999d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/
903 a few gui improvements markom 8000d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
902 separated async and sync cond rst||... and fixed few other bugs in verilog generator; advanced cmov optimization markom 8000d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/
898 l.movhi added; (signed) comparison bug fixed markom 8004d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
897 improved CUC GUI; pre/unroll bugs fixed markom 8005d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
894 Typing mistake fixed. simons 8009d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/
889 Modified Ethernet model. ivang 8009d 22h /or1k/tags/stable_0_2_0_rc1/or1ksim/
886 MMU registers reserved fields protected from writing. simons 8012d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
884 code cleaning - a lot of global variables moved to runtime struct markom 8012d 06h /or1k/tags/stable_0_2_0_rc1/or1ksim/
883 cuc updated, cuc prompt parsing; CSM analysis markom 8013d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/
882 Routine for adjusting read and write delay for devices added. simons 8015d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8018d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
877 ata beta release rherveille 8019d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/
876 Beta release of ATA simulation rherveille 8019d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.