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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [cache/] - Rev 1386

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Rev Log message Author Age Path
1386 Rework exception handling nogj 7031d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7040d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1376 aclocal && autoconf && automake phoenix 7059d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7066d 10h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7075d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7088d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1308 Gyorgy Jeney: extensive cleanup phoenix 7280d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1249 Downgrading back to automake-1.4 lampret 7445d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1117 Ignore generated files for CVS purposes sfurman 7788d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1099 cvs bug fixed markom 7874d 19h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1085 Bug fixed. simons 7887d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
997 PRINTF should be used instead of printf; command redirection repaired markom 7976d 22h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
992 A bug when cache enabled and bus error comes fixed. simons 7978d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
970 Testbench is now running on ORP architecture platform. simons 7984d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
884 code cleaning - a lot of global variables moved to runtime struct markom 8020d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
876 Beta release of ATA simulation rherveille 8028d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
638 TLBTR CI bit is now working properly. simons 8179d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
631 Real cache access is simulated now. simons 8182d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
626 store buffer added markom 8182d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8203d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/

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