OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [cpu/] - Rev 1508

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6938d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 6938d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 6976d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.
nogj 6981d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1484 Use the {set,eval}_direct* functions where they are supposed to be used nogj 6986d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1483 Remove fixed pagesize limitation from the recompiler nogj 7001d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1482 Fix instruction counter nogj 7001d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1481 Remove the useless cross reference stuff: it was a bad idea to begin with nogj 7001d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7001d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1474 * Building op.S and op.o depend on op_t_reg_mov_op.h
* Clean generated files produced by the recompiler
nogj 7001d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1473 Add warning that except_handle may not return nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1452 Implement a dynamic recompiler to speed up the execution nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1446 Cosmetic fixes nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1442 Replace some problematic calles to mfspr/mtspr with direct access to the spr nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1438 NOP_REPORT should report numbers in hex not decimal nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1436 Rearange some code to make it clearer what it does nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1434 Fix the prototype of setsim_reg nogj 7029d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.