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1765 root 5577d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1572 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'. 6851d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1555 * Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c.		 nogj 6859d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1539 Speed up the dmmu nogj 6921d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1538 Speed up the immu nogj 6921d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1532 Add pretty spr dumping code nogj 6925d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6926d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.		 nogj 6926d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1446 Cosmetic fixes nogj 7017d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7017d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1418 Rearange some code such that it is not assumed that except_handle returns nogj 7017d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1416 Make the immu use the new debug functions nogj 7017d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1414 Rearange code in the dmmu such that it is not assumed that except_handle returns nogj 7017d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1412 Make the dmmu use the new debug functions nogj 7017d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7032d 12h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1376 aclocal && autoconf && automake phoenix 7051d 12h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7058d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7067d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7080d 10h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/
1308 Gyorgy Jeney: extensive cleanup phoenix 7272d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/

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