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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] - Rev 1364

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Rev Log message Author Age Path
1364 Clean up the ata peripheral useing the new set of callbacks nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1363 Add status callback nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1362 initialise dev_mem->chip_select in register_memory nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1361 Cleanup test peripheral nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1360 Add dynamic hooks to sim_reset nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1359 Pass private data in readfunc/writefunc callbacks nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7111d 21h /or1k/tags/stable_0_2_0_rc2/
1355 Fix dmatest testcase nogj 7119d 07h /or1k/tags/stable_0_2_0_rc2/
1354 typing fixes phoenix 7120d 03h /or1k/tags/stable_0_2_0_rc2/
1353 Modularise simulator command parsing nogj 7120d 23h /or1k/tags/stable_0_2_0_rc2/
1352 Optimise execution history tracking nogj 7121d 00h /or1k/tags/stable_0_2_0_rc2/
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7121d 00h /or1k/tags/stable_0_2_0_rc2/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7121d 00h /or1k/tags/stable_0_2_0_rc2/
1349 Works with GDB jcastillo 7123d 00h /or1k/tags/stable_0_2_0_rc2/
1348 Converted to current simulator configuration format jcastillo 7126d 05h /or1k/tags/stable_0_2_0_rc2/
1347 Remove backup file nogj 7132d 11h /or1k/tags/stable_0_2_0_rc2/
1346 Remove the global op structure nogj 7134d 04h /or1k/tags/stable_0_2_0_rc2/
1345 Fix out-of-tree builds nogj 7134d 04h /or1k/tags/stable_0_2_0_rc2/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7134d 04h /or1k/tags/stable_0_2_0_rc2/
1343 * Fix warnings in insnset.c and execute.c nogj 7134d 04h /or1k/tags/stable_0_2_0_rc2/

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