OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] - Rev 1358

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7069d 09h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1355 Fix dmatest testcase nogj 7076d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1354 typing fixes phoenix 7077d 14h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1353 Modularise simulator command parsing nogj 7078d 11h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1352 Optimise execution history tracking nogj 7078d 11h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7078d 12h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7078d 12h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1347 Remove backup file nogj 7089d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1346 Remove the global op structure nogj 7091d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1345 Fix out-of-tree builds nogj 7091d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7091d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1343 * Fix warnings in insnset.c and execute.c nogj 7091d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7091d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7091d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1338 l.ff1 instruction added andreje 7107d 14h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1332 gcc 3.4.3 compile fix phoenix 7126d 08h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1324 memory access functions fixes phoenix 7189d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1323 Adrian Wise: or1ksim bugfix & Solaris build phoenix 7190d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1321 some tests rely on exit(0) as a last std output text to pass phoenix 7193d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/
1320 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7195d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.