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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cpu/] - Rev 497

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Rev Log message Author Age Path
497 Fixed encoding of the following insns: l.mac,l.msb,l.maci,l.mtspr,l.mfspr lampret 8254d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
494 trace.h removed; removed absolete trace_fd code - use exe_log instead markom 8255d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
482 profiling uses l.jr instead of obsolete l.jalr markom 8256d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8256d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
464 Some small bugs fixed. simons 8257d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
458 Align, bus error and range exception fixed. simons 8258d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
450 Exceptions are allways enabled. simons 8262d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
447 ITLBMR register bit fields set in order. simons 8263d 05h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
446 ITLBMR register bit fields set in order. simons 8263d 05h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
437 When lsu instruction produce exception registers are preserved. simons 8263d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
433 clkcycle parameter added to configuration markom 8264d 05h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
431 stepping over breakpoint added markom 8264d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
430 dpfault and ipfault exceptions implemented markom 8264d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
429 cache configuration added markom 8264d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
427 memory_table status output; some bugs fixed in configuration loading markom 8264d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
426 memory logging added markom 8265d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
424 memory configuration file joined into .cfg file; *mem.cfg are obsolete; read-only and write-only memory is supported; memory logging is not yet supported; update of testbench - only cache test fails, since it writes to RO memory markom 8265d 03h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
416 IMMU bugs fixed. simons 8267d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
397 removed or16 architecture markom 8278d 01h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
394 dependency joined with dependstats; history moved to sim section markom 8278d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/

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