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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cpu/] - Rev 68

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68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8668d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
67 Added simulator "application load". lampret 8668d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8668d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
65 Added DMMU stats. lampret 8668d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
64 SPR bit definition moved to spr_defs.h. lampret 8668d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8668d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
54 Regular maintenance. lampret 8720d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
52 Comment character changed. lampret 8780d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
51 Exception detection changed a bit. lampret 8780d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
50 Added CURINSN macro. lampret 8780d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
49 Changed simulation mode to non-virtual (real). lampret 8780d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
48 Added CCR. lampret 8780d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
47 Added interrupt recognition and better memory dump. lampret 8780d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
43 SUPV bit from SR is now saved into EPCR bit 0. lampret 8791d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
42 Bug fix. Only symbols with names shorter than 9 characters are loaded. lampret 8791d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
41 Bug fix. Now all COFF sections are loaded not just .text. lampret 8792d 02h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
38 Virtual machine at the moment. lampret 8792d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
37 STACK_SIZE is not properly used (will be removed soon). lampret 8792d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).		 lampret 8792d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
35 SLP hooks. lampret 8792d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/

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