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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cpu/] - Rev 970

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Rev Log message Author Age Path
970 Testbench is now running on ORP architecture platform. simons 8023d 23h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
914 SR[FO] is always set to 1. lampret 8040d 11h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
913 Executed log insns counter output in decimal instead of hex. lampret 8040d 12h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
911 Added instruction count to hardware executed log lampret 8040d 12h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
897 improved CUC GUI; pre/unroll bugs fixed markom 8053d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
886 MMU registers reserved fields protected from writing. simons 8060d 05h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
884 code cleaning - a lot of global variables moved to runtime struct markom 8060d 10h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
883 cuc updated, cuc prompt parsing; CSM analysis markom 8061d 05h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
882 Routine for adjusting read and write delay for devices added. simons 8063d 08h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8066d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
877 ata beta release rherveille 8067d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
876 Beta release of ATA simulation rherveille 8067d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
860 Added delayr and delayw variable initialization (default value 1) ivang 8107d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
848 profiler and mprofiler commands added to interactive mode of or1ksim markom 8121d 11h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
819 Physical address bug fixed. simons 8149d 06h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
815 Elf support added. simons 8150d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
808 Elf support added. simons 8150d 11h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
807 sched files moved to support dir markom 8151d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
805 kbd, fb, vga devices now uses scheduler markom 8151d 14h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/
804 memory regions can now overlap with MC -- not according to MC spec markom 8152d 08h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/

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