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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cpu/] [or1k/] - Rev 1510

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1510 Create a seporate debug channel to dump exceptions to nogj 6948d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1509 Remove 08 prefix from PRIdREG nogj 6948d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6948d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.		 nogj 6948d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 6991d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1481 Remove the useless cross reference stuff: it was a bad idea to begin with nogj 7012d 14h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1473 Add warning that except_handle may not return nogj 7039d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1452 Implement a dynamic recompiler to speed up the execution nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1446 Cosmetic fixes nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1442 Replace some problematic calles to mfspr/mtspr with direct access to the spr nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1404 Move the function of ic_clock() to mtspr() and remove it nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1402 Do what dc_clock() did in mtspr() and remove it nogj 7039d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1386 Rework exception handling nogj 7045d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7054d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1376 aclocal && autoconf && automake phoenix 7073d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1354 typing fixes phoenix 7088d 18h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7089d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/or1k/

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