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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] - Rev 640

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Rev Log message Author Age Path
640 Merge profiler and mprofiler with sim. ivang 8181d 12h /or1k/tags/stable_0_2_0_rc3/
639 MMU cache inhibit bit test added. simons 8184d 02h /or1k/tags/stable_0_2_0_rc3/
638 TLBTR CI bit is now working properly. simons 8184d 02h /or1k/tags/stable_0_2_0_rc3/
637 Updated file names. lampret 8184d 03h /or1k/tags/stable_0_2_0_rc3/
636 Fixed combinational loops. lampret 8184d 03h /or1k/tags/stable_0_2_0_rc3/
635 Fixed Makefile bug. ivang 8184d 05h /or1k/tags/stable_0_2_0_rc3/
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.		 ivang 8185d 07h /or1k/tags/stable_0_2_0_rc3/
633 Bug fix in command line parser. ivang 8185d 07h /or1k/tags/stable_0_2_0_rc3/
632 profiler and mprofiler merged into sim. ivang 8186d 02h /or1k/tags/stable_0_2_0_rc3/
631 Real cache access is simulated now. simons 8187d 01h /or1k/tags/stable_0_2_0_rc3/
630 some bug fixes in store buffer analysis markom 8187d 10h /or1k/tags/stable_0_2_0_rc3/
629 typo fixed markom 8187d 14h /or1k/tags/stable_0_2_0_rc3/
627 or32 restored markom 8187d 14h /or1k/tags/stable_0_2_0_rc3/
626 store buffer added markom 8187d 14h /or1k/tags/stable_0_2_0_rc3/
625 Bus error bug fixed. Cache routines added. simons 8188d 07h /or1k/tags/stable_0_2_0_rc3/
624 Added logging of writes/read to/from SPR registers. ivang 8188d 07h /or1k/tags/stable_0_2_0_rc3/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8188d 09h /or1k/tags/stable_0_2_0_rc3/
622 Cache test works on hardware. simons 8188d 12h /or1k/tags/stable_0_2_0_rc3/
621 Cache test works on hardware. simons 8188d 13h /or1k/tags/stable_0_2_0_rc3/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8188d 13h /or1k/tags/stable_0_2_0_rc3/

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