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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] - Rev 997

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Rev Log message Author Age Path
997 PRINTF should be used instead of printf; command redirection repaired markom 7981d 09h /or1k/tags/stable_0_2_0_rc3/
996 some minor bugs fixed markom 7982d 08h /or1k/tags/stable_0_2_0_rc3/
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7982d 16h /or1k/tags/stable_0_2_0_rc3/
993 Fixed IMMU bug. lampret 7982d 16h /or1k/tags/stable_0_2_0_rc3/
992 A bug when cache enabled and bus error comes fixed. simons 7983d 01h /or1k/tags/stable_0_2_0_rc3/
991 Different memory controller. simons 7983d 01h /or1k/tags/stable_0_2_0_rc3/
990 Test is now complete. simons 7983d 01h /or1k/tags/stable_0_2_0_rc3/
989 c++ is making problems so, for now, it is excluded. simons 7984d 09h /or1k/tags/stable_0_2_0_rc3/
988 ORP architecture supported. simons 7985d 00h /or1k/tags/stable_0_2_0_rc3/
987 ORP architecture supported. simons 7985d 08h /or1k/tags/stable_0_2_0_rc3/
986 outputs out of function are not registered anymore markom 7985d 08h /or1k/tags/stable_0_2_0_rc3/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7985d 20h /or1k/tags/stable_0_2_0_rc3/
984 Disable SB until it is tested lampret 7985d 20h /or1k/tags/stable_0_2_0_rc3/
983 First checkin lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/
982 Moved to sim/bin lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/
981 First checkin. lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/
980 Removed sim.tcl that shouldn't be here. lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/
979 Removed old test case binaries. lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/
978 Added variable delay for SRAM. lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/
977 Added store buffer. lampret 7985d 22h /or1k/tags/stable_0_2_0_rc3/

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