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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [testbench/] - Rev 1783

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Rev	Log message	Author	Age	Path
1765		root	5571d 03h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1648	This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'.		6718d 06h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1646	This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'.		6718d 06h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1614	CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU)	phoenix	6763d 01h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1578	Put consecutive asm statements into one __asm__() block to prevent gcc from scheduleing other instructions between them.	nogj	6829d 14h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1568	Update config files	nogj	6852d 09h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1566	Make the timer test emit the correct success protocol	nogj	6852d 09h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1565	Revert previous `fix' to accept the correct return code	nogj	6852d 09h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1552	Update most config.guess and config.sub scripts.	robertmh	6899d 06h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1549	Spelling fixes	nogj	6915d 06h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1540	* Breakup the tick_job function into smaller ones. * Fix lots of conner cases. * Add tests for the tick timer.	nogj	6915d 06h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1523	Bring config files up-to-date with recent changes	nogj	6920d 14h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1498	Correct a couple of tests	nogj	6935d 13h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1497	Print more verbose ouput	nogj	6935d 13h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1486	* Seporate out the code used for handling the memory peripheral to peripheral/memory.c * Mostly decouple the memory controller from the internals of the memory handling. * Rewrite memory handling to be more linear and thus much faster. * Issue a bus error on read/write with invalid granularity.	nogj	6963d 14h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1446	Cosmetic fixes	nogj	7011d 09h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1424	Update the config files for the tests to the new format	nogj	7011d 10h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1422	Remove the useless include "sys/time.h"	nogj	7011d 10h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1420	Fix test to expect the correct `return code'	nogj	7011d 10h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/
1355	Fix dmatest testcase	nogj	7059d 15h	/or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/

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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [testbench/] - Rev 1783

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