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[/] [or1k/] [tags/] [tn_m001/] [or1ksim/] [cache/] - Rev 1765

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1765 root 5586d 09h /or1k/tags/tn_m001/or1ksim/cache/
861 This commit was manufactured by cvs2svn to create tag 'tn_m001'. 8069d 09h /or1k/tags/tn_m001/or1ksim/cache/
638 TLBTR CI bit is now working properly. simons 8180d 10h /or1k/tags/tn_m001/or1ksim/cache/
631 Real cache access is simulated now. simons 8183d 09h /or1k/tags/tn_m001/or1ksim/cache/
626 store buffer added markom 8183d 22h /or1k/tags/tn_m001/or1ksim/cache/
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8204d 18h /or1k/tags/tn_m001/or1ksim/cache/
517 some performance optimizations markom 8208d 17h /or1k/tags/tn_m001/or1ksim/cache/
500 Added .cvsignore files for annoying generated files erez 8210d 21h /or1k/tags/tn_m001/or1ksim/cache/
429 cache configuration added markom 8232d 17h /or1k/tags/tn_m001/or1ksim/cache/
428 cache configuration added markom 8232d 17h /or1k/tags/tn_m001/or1ksim/cache/
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8271d 21h /or1k/tags/tn_m001/or1ksim/cache/
247 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8276d 03h /or1k/tags/tn_m001/or1ksim/cache/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8280d 21h /or1k/tags/tn_m001/or1ksim/cache/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8357d 17h /or1k/tags/tn_m001/or1ksim/cache/
110 bug fix. markom 8435d 20h /or1k/tags/tn_m001/or1ksim/cache/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8440d 02h /or1k/tags/tn_m001/or1ksim/cache/
84 Update. lampret 8486d 18h /or1k/tags/tn_m001/or1ksim/cache/
79 Data and instruction cache simulation added. lampret 8516d 10h /or1k/tags/tn_m001/or1ksim/cache/
76 regular update lampret 8640d 00h /or1k/tags/tn_m001/or1ksim/cache/
54 Regular maintenance. lampret 8710d 00h /or1k/tags/tn_m001/or1ksim/cache/

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