URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 1020

Rev	Log message	Author	Age	Path
1020	Fixed several bugs Working version, tested on Bender hardware	rherveille	8005d 18h	/or1k/trunk/
1019	fixed some bugs detected by Bender hardware	rherveille	8005d 18h	/or1k/trunk/
1018	TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2)	simons	8006d 00h	/or1k/trunk/
1017	TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2)	simons	8006d 01h	/or1k/trunk/
1016	64 bytes is the smallest packet size.	simons	8006d 17h	/or1k/trunk/
1015	Host type was not recognized.	simons	8007d 03h	/or1k/trunk/
1014	added _JBLEN definition for or1k	ivang	8007d 16h	/or1k/trunk/
1013	ORP architecture supported.	simons	8007d 18h	/or1k/trunk/
1011	Removed some commented RTL. Fixed SR/ESR flag bug.	lampret	8008d 12h	/or1k/trunk/
1010	Import	ivang	8012d 15h	/or1k/trunk/
1009	Import	ivang	8012d 15h	/or1k/trunk/
1008	Import	ivang	8012d 15h	/or1k/trunk/
1007	Import	ivang	8012d 16h	/or1k/trunk/
1006	Import	ivang	8012d 16h	/or1k/trunk/
1005	Import	ivang	8012d 16h	/or1k/trunk/
1004	Now every ramdisk image should have init program.	simons	8013d 00h	/or1k/trunk/
1003	cuc temporary files are deleted upon exiting	markom	8013d 00h	/or1k/trunk/
1002	Now every ramdisk image should have init program.	simons	8013d 00h	/or1k/trunk/
1001	fixed load/store state machine verilog generation errors	markom	8013d 00h	/or1k/trunk/
1000	IC/DC cache enable routines fixed.	simons	8013d 01h	/or1k/trunk/