URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 1100

Rev	Log message	Author	Age	Path
1100	cvs problem fixed	markom	7879d 18h	/or1k/trunk/
1099	cvs bug fixed	markom	7879d 18h	/or1k/trunk/
1098	small bug in cuc fixed	markom	7879d 18h	/or1k/trunk/
1097	Cache invalidate bug fixed.	simons	7880d 08h	/or1k/trunk/
1096	An example of SW and RTL regression log because many people asked for.	lampret	7886d 06h	/or1k/trunk/
1095	eval_reg replaced with the new evalsim_reg32	lampret	7887d 02h	/or1k/trunk/
1094	sys/time.h might not be available for or1k target	lampret	7887d 03h	/or1k/trunk/
1093	New UART rx/tx fiel settings (due to or1ksim upgrade)	lampret	7887d 03h	/or1k/trunk/
1092	Changed from or32-rtems toolchain to or32-uclinux.	lampret	7887d 03h	/or1k/trunk/
1091	Added mmu test.	lampret	7887d 03h	/or1k/trunk/
1090	Removed ic_invalidate	lampret	7887d 03h	/or1k/trunk/
1089	Added dhrystone 2.1 benchmark	lampret	7887d 04h	/or1k/trunk/
1088	Changed from or32-rtems toolchain to or32-uclinux.	lampret	7887d 04h	/or1k/trunk/
1087	Changed or32-rtems to or32-uclinux.	lampret	7887d 04h	/or1k/trunk/
1086	STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0.	lampret	7887d 04h	/or1k/trunk/
1085	Bug fixed.	simons	7892d 08h	/or1k/trunk/
1083	SB mem width fixed.	simons	7906d 15h	/or1k/trunk/
1082	channels integration	rprescott	7907d 03h	/or1k/trunk/
1081	or32-uclinux tool chain have to be used to build the testbench.	simons	7914d 20h	/or1k/trunk/
1079	RAMs wrong connected to the BIST scan chain.	mohor	7915d 13h	/or1k/trunk/