OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 194

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8323d 22h /or1k/trunk/
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8323d 22h /or1k/trunk/
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8324d 07h /or1k/trunk/
191 Added UART jitter var to sim config chris 8325d 03h /or1k/trunk/
190 Added jitter initialization chris 8325d 03h /or1k/trunk/
189 fixed mode handling for tick facility chris 8325d 04h /or1k/trunk/
188 fixed PIC interrupt controller chris 8325d 04h /or1k/trunk/
187 minor change to clear pending exception chris 8325d 04h /or1k/trunk/
186 major change to UART structure chris 8325d 04h /or1k/trunk/
185 major change to UART code chris 8325d 04h /or1k/trunk/
184 modified decode for trace debugging chris 8325d 04h /or1k/trunk/
183 changed special case for PICSR chris 8325d 04h /or1k/trunk/
182 updated exception handling procedures chris 8325d 04h /or1k/trunk/
181 Added trace/stall commands chris 8325d 04h /or1k/trunk/
180 Updated debug. lampret 8325d 09h /or1k/trunk/
179 Sim run script lampret 8345d 02h /or1k/trunk/
178 Some test code lampret 8345d 02h /or1k/trunk/
177 Improved wb_sram model lampret 8345d 02h /or1k/trunk/
176 IC enable/disable. lampret 8345d 02h /or1k/trunk/
175 Added new configure option --enable-impl=[default,mp3,bender],
which defines IMPL_impl.
It selects implementation specific environment. One should
#ifdef the code that is different than default.		 markom 8345d 21h /or1k/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.