URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [trunk/] - Rev 367

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Rev	Log message	Author	Age	Path
367	Changed DSR/DRR behavior and exception detection.	lampret	8261d 21h	/or1k/trunk/
366	* empty log message *	simons	8262d 11h	/or1k/trunk/
365	Added wb_cyc_o assignment after it was removed by accident.	lampret	8262d 16h	/or1k/trunk/
364	info spr bug fixed	markom	8263d 15h	/or1k/trunk/
363	program can be stepped and continued before running it, supporting low level debugging	markom	8263d 16h	/or1k/trunk/
362	some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction	markom	8263d 21h	/or1k/trunk/
361	set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts	markom	8263d 22h	/or1k/trunk/
360	Added OR1200_REGISTERED_INPUTS.	lampret	8264d 08h	/or1k/trunk/
359	Added optional sampling of inputs.	lampret	8264d 08h	/or1k/trunk/
358	Fixed virtual silicon single-port rams instantiation.	lampret	8264d 08h	/or1k/trunk/
357	Fixed dbg_is_o assignment width.	lampret	8264d 08h	/or1k/trunk/
356	Break point bug fixed	simons	8264d 11h	/or1k/trunk/
355	uart VAPI model improved; changes to MC and eth.	markom	8264d 18h	/or1k/trunk/
354	Fixed width of du_except.	lampret	8265d 05h	/or1k/trunk/
353	Cashes disabled.	simons	8265d 15h	/or1k/trunk/
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8266d 18h	/or1k/trunk/
351	Fixed some l.trap typos.	lampret	8266d 20h	/or1k/trunk/
350	For GDB changed single stepping and disabled trap exception.	lampret	8266d 21h	/or1k/trunk/
349	Some bugs regarding cache simulation fixed.	simons	8268d 10h	/or1k/trunk/
348	Added instructions on how to build configure.	ivang	8269d 18h	/or1k/trunk/

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[/] [or1k/] [trunk/] - Rev 367

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