OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 70

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
70 Basic setjmp/longjmp are ready. lampret 8648d 06h /or1k/trunk/
69 Sim debug. lampret 8650d 04h /or1k/trunk/
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8650d 04h /or1k/trunk/
67 Added simulator "application load". lampret 8650d 04h /or1k/trunk/
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8650d 04h /or1k/trunk/
65 Added DMMU stats. lampret 8650d 04h /or1k/trunk/
64 SPR bit definition moved to spr_defs.h. lampret 8650d 04h /or1k/trunk/
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8650d 04h /or1k/trunk/
62 OR1K DMMU model. lampret 8650d 04h /or1k/trunk/
61 2000-09-26 Joel Sherrill <joel@OARcorp.com>

* libc/sys/rtems/include/pthread.h: Added file missed by earlier
commit of RTEMS modifications.		 joel 8664d 22h /or1k/trunk/
60 Memory model changed. lampret 8685d 07h /or1k/trunk/
59 2000-09-05 Joel Sherrill <joel@OARcorp.com>

* Merged newlib-1.8.2-rtems-20000905.diff which includes
or16 and or32 configuration support.		 joel 8685d 18h /or1k/trunk/
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8691d 16h /or1k/trunk/
55 Added 'dv' command for dumping memory as verilog model. lampret 8701d 04h /or1k/trunk/
54 Regular maintenance. lampret 8701d 04h /or1k/trunk/
53 Added setjmp/longjmp. lampret 8706d 04h /or1k/trunk/
52 Comment character changed. lampret 8762d 00h /or1k/trunk/
51 Exception detection changed a bit. lampret 8762d 00h /or1k/trunk/
50 Added CURINSN macro. lampret 8762d 00h /or1k/trunk/
49 Changed simulation mode to non-virtual (real). lampret 8762d 00h /or1k/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.