URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 987

Rev	Log message	Author	Age	Path
987	ORP architecture supported.	simons	7979d 08h	/or1k/trunk/
986	outputs out of function are not registered anymore	markom	7979d 09h	/or1k/trunk/
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	7979d 21h	/or1k/trunk/
984	Disable SB until it is tested	lampret	7979d 21h	/or1k/trunk/
983	First checkin	lampret	7979d 23h	/or1k/trunk/
982	Moved to sim/bin	lampret	7979d 23h	/or1k/trunk/
981	First checkin.	lampret	7979d 23h	/or1k/trunk/
980	Removed sim.tcl that shouldn't be here.	lampret	7979d 23h	/or1k/trunk/
979	Removed old test case binaries.	lampret	7979d 23h	/or1k/trunk/
978	Added variable delay for SRAM.	lampret	7979d 23h	/or1k/trunk/
977	Added store buffer.	lampret	7979d 23h	/or1k/trunk/
976	Added store buffer	lampret	7979d 23h	/or1k/trunk/
975	First checkin	lampret	7979d 23h	/or1k/trunk/
974	Enabled what works on or1ksim and disabled other tests.	lampret	7980d 01h	/or1k/trunk/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	7982d 05h	/or1k/trunk/
972	Interrupt suorces fixed.	simons	7982d 05h	/or1k/trunk/
971	Now even keyboard test passes.	simons	7982d 08h	/or1k/trunk/
970	Testbench is now running on ORP architecture platform.	simons	7982d 21h	/or1k/trunk/
969	Checking in except directory.	lampret	7983d 13h	/or1k/trunk/
968	Checking in utils directory.	lampret	7983d 13h	/or1k/trunk/