URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 988

Rev	Log message	Author	Age	Path
988	ORP architecture supported.	simons	7990d 12h	/or1k/trunk/
987	ORP architecture supported.	simons	7990d 20h	/or1k/trunk/
986	outputs out of function are not registered anymore	markom	7990d 20h	/or1k/trunk/
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	7991d 08h	/or1k/trunk/
984	Disable SB until it is tested	lampret	7991d 08h	/or1k/trunk/
983	First checkin	lampret	7991d 10h	/or1k/trunk/
982	Moved to sim/bin	lampret	7991d 10h	/or1k/trunk/
981	First checkin.	lampret	7991d 10h	/or1k/trunk/
980	Removed sim.tcl that shouldn't be here.	lampret	7991d 10h	/or1k/trunk/
979	Removed old test case binaries.	lampret	7991d 10h	/or1k/trunk/
978	Added variable delay for SRAM.	lampret	7991d 10h	/or1k/trunk/
977	Added store buffer.	lampret	7991d 10h	/or1k/trunk/
976	Added store buffer	lampret	7991d 10h	/or1k/trunk/
975	First checkin	lampret	7991d 10h	/or1k/trunk/
974	Enabled what works on or1ksim and disabled other tests.	lampret	7991d 12h	/or1k/trunk/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	7993d 16h	/or1k/trunk/
972	Interrupt suorces fixed.	simons	7993d 17h	/or1k/trunk/
971	Now even keyboard test passes.	simons	7993d 19h	/or1k/trunk/
970	Testbench is now running on ORP architecture platform.	simons	7994d 08h	/or1k/trunk/
969	Checking in except directory.	lampret	7995d 00h	/or1k/trunk/