URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [mp3/] [bench/] [verilog/] - Rev 1774

Rev	Log message	Author	Age	Path
1765		root	5569d 14h	/or1k/trunk/mp3/bench/verilog/
636	Fixed combinational loops.	lampret	8163d 17h	/or1k/trunk/mp3/bench/verilog/
618	Fixed display of new 'void' nop insns.	lampret	8168d 11h	/or1k/trunk/mp3/bench/verilog/
597	Fixed OR1200_XILINX_RAM32X1D.	lampret	8176d 23h	/or1k/trunk/mp3/bench/verilog/
591	Added support for reading XILINX_RAM32X1D register file.	lampret	8178d 05h	/or1k/trunk/mp3/bench/verilog/
590	Added test case for testing NPC read bug when doing single-step.	lampret	8178d 05h	/or1k/trunk/mp3/bench/verilog/
563	Added debug model for testing du. Updated or1200_monitor.	lampret	8182d 06h	/or1k/trunk/mp3/bench/verilog/
506	Added second clock as RISC main clock. Updated or120_monitor.	lampret	8193d 04h	/or1k/trunk/mp3/bench/verilog/
368	Typos.	lampret	8234d 04h	/or1k/trunk/mp3/bench/verilog/
318	Modified monitor tu support exceptions.	lampret	8247d 08h	/or1k/trunk/mp3/bench/verilog/
266	First import.	lampret	8252d 18h	/or1k/trunk/mp3/bench/verilog/