URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [mp3/] [bench/] [verilog/] - Rev 1780

Rev	Log message	Author	Age	Path
1765		root	5567d 16h	/or1k/trunk/mp3/bench/verilog/
636	Fixed combinational loops.	lampret	8161d 18h	/or1k/trunk/mp3/bench/verilog/
618	Fixed display of new 'void' nop insns.	lampret	8166d 13h	/or1k/trunk/mp3/bench/verilog/
597	Fixed OR1200_XILINX_RAM32X1D.	lampret	8175d 00h	/or1k/trunk/mp3/bench/verilog/
591	Added support for reading XILINX_RAM32X1D register file.	lampret	8176d 06h	/or1k/trunk/mp3/bench/verilog/
590	Added test case for testing NPC read bug when doing single-step.	lampret	8176d 06h	/or1k/trunk/mp3/bench/verilog/
563	Added debug model for testing du. Updated or1200_monitor.	lampret	8180d 08h	/or1k/trunk/mp3/bench/verilog/
506	Added second clock as RISC main clock. Updated or120_monitor.	lampret	8191d 06h	/or1k/trunk/mp3/bench/verilog/
368	Typos.	lampret	8232d 06h	/or1k/trunk/mp3/bench/verilog/
318	Modified monitor tu support exceptions.	lampret	8245d 10h	/or1k/trunk/mp3/bench/verilog/
266	First import.	lampret	8250d 19h	/or1k/trunk/mp3/bench/verilog/