URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] - Rev 25

Rev	Log message	Author	Age	Path
25	Bug fix in handling labels when loading code into simulator memory.	lampret	8863d 20h	/or1k/trunk/or1ksim/cpu/
24	Static branch prediction added.	lampret	8863d 20h	/or1k/trunk/or1ksim/cpu/
23	Common OR1K backend for OR32 and OR16.	lampret	8863d 20h	/or1k/trunk/or1ksim/cpu/
22	More modifications related to or16.	lampret	8866d 02h	/or1k/trunk/or1ksim/cpu/
20	or1k renamed to or32.	lampret	8866d 15h	/or1k/trunk/or1ksim/cpu/
19	Added or16, or1k renamed to or32.	lampret	8866d 15h	/or1k/trunk/or1ksim/cpu/
18	or16 added, or1k renamed to or32.	lampret	8866d 15h	/or1k/trunk/or1ksim/cpu/
13	Rebuild of the generated files.	jrydberg	8927d 07h	/or1k/trunk/or1ksim/cpu/
8	Initial revision.	jrydberg	8927d 08h	/or1k/trunk/or1ksim/cpu/
7	Major update of the enviorment. Now uses autoconf and automake. The simulator uses readline aswell to get input from the user. A number of new files added, some modified. The libc directory is now called support.	jrydberg	8927d 08h	/or1k/trunk/or1ksim/cpu/
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8928d 02h	/or1k/trunk/or1ksim/cpu/
3	This commit was generated by cvs2svn to compensate for changes in r2, which included commits to RCS files with non-trunk default branches.	cvs	9053d 19h	/or1k/trunk/or1ksim/cpu/